As is known in the art of switching power supplies, or converters, a Buck topology is used to convert an input voltage to a lower output voltage. A synchronous Buck converter includes a pair of switching transistors coupled in series across the input voltage source, with a high side switch coupled to the input voltage and a low side switch coupled to ground. The switches are controlled to alternatingly conduct with complementary duty cycles to maintain a predetermined output voltage. An output filter, including an inductor and a capacitor, is coupled to the interconnection between the pair of switching transistors and averages the switched input voltage to provide the output voltage.
The use of N-channel MOSFET devices for the converter switching elements is advantageous due to the relatively low drain to source resistance associated with such devices and thus, the correspondingly low power dissipation. More particularly, in order to realize the desired low drain to source resistance, the high side NMOS switch requires a gate drive signal of greater amplitude than the input voltage. Specifically, a gate to source voltage of approximately ten volts is required to fully enhance the NMOS switch.
Various techniques are available for generating the requisite gate voltage for the high side NMOS switch, including the use of a voltage doubler circuit or a boost converter. However, both of these techniques require an additional switching element and other circuitry, thereby disadvantageously adding to the cost and complexity of the converter.
Another technique for providing the necessary gate drive voltage to the high side NMOS switch is to charge a bootstrap capacitor with the input voltage, or a regulated version thereof. In order to avoid the necessity of using an additional switch, the charge path for the bootstrap capacitor includes the low side NMOS switch. However, in certain instances, such as where the input voltage is provided by a battery with a voltage which inherently decays over time or where the converter output is heavily loaded, a sufficient gate voltage level may not be continuously maintained. That is, in such applications, 100% duty cycle operation of the high side switch will be required. Since the bootstrap capacitor charges through the low side switch, its charge time and thus, the bootstrap voltage may decrease to an unacceptable level by the concomitantly reduced duty cycle of the low side switch.